130 lines
5.4 KiB
Plaintext
130 lines
5.4 KiB
Plaintext
###############################################################################
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## PN553 RF config add phone off EMvco test 20,Dec 2019###
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_1={
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20, 02, E7, 1B,
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A0, 0D, 06, 06, 37, 08, 76, 00, 00,
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A0, 0D, 03, 24, 03, 7E,
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A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
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A0, 0D, 06, 04, 35, F4, 05, 70, 02,
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A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
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A0, 0D, 06, 04, 42, F8, 40, FF, FF,
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A0, 0D, 04, 32, 42, F8, 40,
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A0, 0D, 04, 46, 42, 68, 40,
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A0, 0D, 04, 56, 42, 78, 40,
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A0, 0D, 04, 5C, 42, 80, 40,
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A0, 0D, 04, CA, 42, 68, 40,
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A0, 0D, 06, 06, 42, 00, 02, F6, F6,
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A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
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A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
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A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
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A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
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A0, 0D, 06, 34, 44, 66, 08, 00, 00,
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A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 58, 44, 55, 08, 00, 00,
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A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
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A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 06, 44, 04, 04, C4, 00,
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A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
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A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
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A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
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A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
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A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_2={
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20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 47, 40, 00, 00, 40, 00, 96, 00, 40, 00, D2, 00, 40, 00, 2C, 01, 40, 00, D0, 01, 40, 00, D7, 02, 00, 00, 33, 04, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 00, 40, 00, 96, 00, 40, 00, D2, 00, 40, 00, 2C, 01, 40, 00, D0, 01, 40, 00, D7, 02, 00, 00, 33, 04, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_3={
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20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_4={
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20, 02, 21, 04,
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A0, 38, 04, 14, 0B, 0B, 00,
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A0, 3A, 08, E1, 00, E1, 00, E1, 00, E1, 00,
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A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
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A0, B1, 02, BB, 08
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_5={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_6={
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#}
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###############################################################################
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# Core configuration extensions
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# It includes
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# Wired mode settings A0ED, A0EE
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# Tag Detector A040, A041, A043
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# Low Power mode A007
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# Clock settings A002, A003
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# PbF settings A008
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# Clock timeout settings A004
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# eSE (SVDD) PWR REQ settings A0F2
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# How eSE connected to PN553 A012
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# UICC bit rate A0D1
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# SWP1A interface A0D4
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# DWP intf behavior config, SVDD Load activated by default if set to 0x31 - A037
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NXP_CORE_CONF_EXTN={20, 02, 47, 0C,
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A0, EC, 01, 01,
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A0, ED, 01, 00,
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A0, 5E, 01, 01,
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A0, 12, 01, 02,
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A0, 40, 01, 01,
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A0, 41, 01, 05,
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A0, 43, 01, 04,
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A0, DD, 01, 2D,
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A0, D1, 01, 06,
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A0, D4, 01, 01,
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A0, 37, 01, 35,
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A0, 29, 17, 19, 07, 00, 1D, 00, 02, 00, 1D, 00, 02, 00, 40, F3, F3, 00, 43, F3, F3, 38, 70, 00, 00, 00
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}
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# A0, F2, 01, 01,
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# A0, 40, 01, 01,
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# A0, 41, 01, 02,
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# A0, 43, 01, 04,
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# A0, 02, 01, 01,
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# A0, 03, 01, 11,
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# A0, 07, 01, 03,
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# A0, 08, 01, 01
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# }
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###############################################################################
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# Core configuration settings
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NXP_CORE_CONF={ 20, 02, 2E, 0E,
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28, 01, 00,
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21, 01, 00,
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30, 01, 08,
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31, 01, 03,
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32, 01, 60,
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38, 01, 01,
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33, 04, 01, 02, 03, 04,
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54, 01, 06,
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50, 01, 02,
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5B, 01, 00,
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80, 01, 01,
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81, 01, 01,
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82, 01, 0E,
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18, 01, 01
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}
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###############################################################################
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